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"Silicon Process Impact on 5G NR mmWave Front End Design and Performance."

Chuan-Cheng Cheng et al. (2019)

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DOI: 10.1109/VLSI-DAT.2019.8741576

access: closed

type: Conference or Workshop Paper

metadata version: 2022-12-23

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  - conf/vlsi-dat/ChengDKCLYSWSC19
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  - https://dblp.org/rec/conf/vlsi-dat/ChengDKCLYSWSC19
Chuan-Cheng Cheng, Jeremy Dunworth, Sriram Kalpat, Haitao Cheng, Gang Liu, Ming-Ta Yang, Wing Sy, Joseph Wang, Kamal Sahota, P. R. Chidi Chidambaram:
Silicon Process Impact on 5G NR mmWave Front End Design and Performance. VLSI-DAT 2019: 1-2

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