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"An all-digital Read Stability and Write Margin characterization scheme for ..."

Yi-Wei Lin et al. (2012)

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DOI: 10.1109/VLSI-DAT.2012.6212589

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Yi-Wei Lin, Ming-Chien Tsai, Hao-I Yang, Geng-Cing Lin, Shao-Cheng Wang, Ching-Te Chuang, Shyh-Jye Jou, Wei Hwang, Nan-Chun Lien, Kuen-Di Lee, Wei-Chiang Shih:
An all-digital Read Stability and Write Margin characterization scheme for CMOS 6T SRAM array. VLSI-DAT 2012: 1-4

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