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"Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs."

Yu-Zhe Wang et al. (2019)

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DOI: 10.1109/VLSI-DAT.2019.8741726

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-27

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  - conf/vlsi-dat/WangWCCY19
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  - https://dblp.org/rec/conf/vlsi-dat/WangWCCY19
Yu-Zhe Wang, Jingjie Wu, Shi-Hao Chen, Mango Chia-Tso Chao, Chia-Hsiang Yang:
Micro-Architecture Optimization for Low-Power Bitcoin Mining ASICs. VLSI-DAT 2019: 1-4

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