"System and Procesor Design Effort Estimation."

Cyrus Bazeghi, Francisco J. Mesa-Martinez, Jose Renau (2007)

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DOI: 10.1007/978-0-387-89558-1_14

access: open

type: Conference or Workshop Paper

metadata version: 2018-06-26

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Cyrus Bazeghi, Francisco J. Mesa-Martinez, Jose Renau:
System and Procesor Design Effort Estimation. VLSI-SoC (Selected Papers) 2007: 1-21

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