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"A soft error robust 32kb SRAM macro featuring access transistor-less 8T ..."
Jaspal Singh Shah, David Nairn, Manoj Sachdev (2012)
- Jaspal Singh Shah, David Nairn, Manoj Sachdev:
A soft error robust 32kb SRAM macro featuring access transistor-less 8T cell in 65-nm. VLSI-SoC 2012: 275-278
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