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"A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and ..."

Ahmed M. A. Ali et al. (2016)

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DOI: 10.1109/VLSIC.2016.7573537

access: closed

type: Conference or Workshop Paper

metadata version: 2019-07-10

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Ahmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Puckett, Andy Morgan, Ning Zhu, Qicheng Yu, Christopher Dillon, Bryce Gray, Jonathan Lanford, Matthew McShea, Ushma Mehta, Scott Bardsley, Peter R. Derounian, Ryan Bunch, Ralph Moore, Gerry Taylor:
A 14-bit 2.5GS/s and 5GS/s RF sampling ADC with background calibration and dither. VLSI Circuits 2016: 1-2

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