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"A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a ..."

Yeunhee Huh et al. (2018)

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DOI: 10.1109/VLSIC.2018.8502284

access: closed

type: Conference or Workshop Paper

metadata version: 2018-10-30

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Yeunhee Huh, Se-Un Shin, Sung-Wan Hong, Young-Jin Woo, Yong-Min Ju, Sung-Won Choi, Gyu-Hyeong Cho:
A Hybrid Dual-Path Step-Down Converter with 96.2% Peak Efficiency Using a $250\text{m}$ μ Large-DCR Inductor. VLSI Circuits 2018: 225-226

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