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"A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using ..."

Yi Zhang et al. (2016)

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DOI: 10.1109/VLSIC.2016.7573464

access: closed

type: Conference or Workshop Paper

metadata version: 2018-01-10

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Yi Zhang, Chia-Hung Chen, Tao He, Gabor C. Temes:
A 35µW 96.8dB SNDR 1 kHz BW multi-step incremental ADC using multi-slope extended counting with a single integrator. VLSI Circuits 2016: 1-2

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