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"Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS."

Maryam Ashouei, Adit D. Singh, Abhijit Chatterjee (2008)

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DOI: 10.1109/VLSI.2008.104

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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  dblp key:
  - conf/vlsid/AshoueiSC08
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  persistent URL:
  - https://dblp.org/rec/conf/vlsid/AshoueiSC08
Maryam Ashouei, Adit D. Singh, Abhijit Chatterjee:
Reconfiguring CMOS as Pseudo N/PMOS for Defect Tolerance in Nano-Scale CMOS. VLSI Design 2008: 27-32

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