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"A Hierarchical Methodology for Word-Length Optimization of Signal ..."

Karthick Parashar et al. (2010)

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DOI: 10.1109/VLSI.DESIGN.2010.66

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Karthick Parashar, Romuald Rocher, Daniel Ménard, Olivier Sentieys:
A Hierarchical Methodology for Word-Length Optimization of Signal Processing Systems. VLSI Design 2010: 318-323

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