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"A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C ..."
Hechen Wang et al. (2022)
- Hechen Wang
, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Xiaosen Liu, Dan Lake, Brent R. Carlton, May Wu:
A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference. VLSI Technology and Circuits 2022: 36-37
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