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"Modified flip-flop architecture to reduce hold buffers and peak power ..."

Prakash Narayanan et al. (2011)

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DOI: 10.1109/VTS.2011.5783776

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-25

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  - conf/vts/NarayananMPSS11
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Prakash Narayanan, Rajesh Mittal, Sumanth Poddutur, Vivek Singhal, Puneet Sabbarwal:
Modified flip-flop architecture to reduce hold buffers and peak power during scan shift operation. VTS 2011: 154-159

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