"Gate-Level RTL Description of the Glitch Optimized Multipliers."

Anuradha Chathuranga Ranasinghe, Sabih H. Gerez (2022)

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DOI: 10.21227/AEQK-7J60

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type: Data or Artifact

metadata version: 2024-06-18

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Anuradha Chathuranga Ranasinghe, Sabih H. Gerez:
Gate-Level RTL Description of the Glitch Optimized Multipliers. IEEE DataPort, 2022

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