"Accelerating SystemVerilog UVM Based VIP to Improve Methodology for ..."

Abhishek Jain et al. (2014)

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DOI: —

access: open

type: Informal or Other Publication

metadata version: 2018-08-13

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  - electronic edition @ arxiv.org (open access)
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  dblp key:
  - journals/corr/0003GGD14
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  persistent URL:
  - https://dblp.org/rec/journals/corr/0003GGD14
Abhishek Jain, Piyush Kumar Gupta, Hima Gupta, Sachish Dhar:
Accelerating SystemVerilog UVM Based VIP to Improve Methodology for Verification of Image Signal Processing Designs Using HW Emulator. CoRR abs/1401.3554 (2014)

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