"Design and Implementation of a 16-bit Multi-mode 4-Channel ..."

Abolfazl Roshanpanah et al. (2025)

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DOI: 10.1007/S00034-024-02835-7

access: closed

type: Journal Article

metadata version: 2025-05-09

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  - https://dblp.org/rec/journals/cssp/RoshanpanahTHD25
Abolfazl Roshanpanah, Pooya Torkzadeh, Khosrow Hajsadeghi, Massoud Dousti:
Design and Implementation of a 16-bit Multi-mode 4-Channel Time-Interleaved Delta-Sigma Modulator with SNDR > 106 dB and DCE Compensation Based on FPGA. Circuits Syst. Signal Process. 44(4): 2473-2502 (2025)

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