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"A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and ..."

D. A. Tran et al. (2014)

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DOI: 10.1007/S10836-014-5459-3

access: closed

type: Journal Article

metadata version: 2023-03-21

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D. A. Tran, Arnaud Virazel, Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Hans-Joachim Wunderlich:
A New Hybrid Fault-Tolerant Architecture for Digital CMOS Circuits and Systems. J. Electron. Test. 30(4): 401-413 (2014)

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