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"Using Transformations and Verification in Circuit Design."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

James B. Saxe et al. (1993)

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DOI: 10.1007/BF01384073

access: closed

type: Journal Article

metadata version: 2020-03-13

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  dblp key:
  - journals/fmsd/SaxeHGG93
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  - https://dblp.org/rec/journals/fmsd/SaxeHGG93
James B. Saxe, James J. Horning, John V. Guttag, Stephen J. Garland:
Using Transformations and Verification in Circuit Design. Formal Methods Syst. Des. 3(3): 181-209 (1993)

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