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"Low Latency, High Throughput, and Less Complex VLSI Architecture for 2D-DFT."
Sohil Shah et al. (2010)
- Sohil Shah, Preethi Venkatesan, Deepa Sundar, Muniandi Kannan:
Low Latency, High Throughput, and Less Complex VLSI Architecture for 2D-DFT. Int. Arab J. Inf. Technol. 7(1): 39-44 (2010)
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