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"Hardware accelerator for high accuracy sign language recognition with ..."

Dong Yang et al. (2024)

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DOI: 10.1587/ELEX.21.20230579

access: open

type: Journal Article

metadata version: 2024-05-18

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  - https://dblp.org/rec/journals/ieiceee/YangLHCWDHZL24
Dong Yang, Jianwu Li, Guocun Hao, Qirui Chen, Xi Wei, Zirui Dai, Zixian Hou, Lei Zhang, Xiaoran Li:
Hardware accelerator for high accuracy sign language recognition with residual network based on FPGAs. IEICE Electron. Express 21(4): 20230579 (2024)

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