"Design of High-ESD Reliability in HV Power pLDMOS Transistors by the ..."

Shen-Li Chen, Yu-Ting Huang, Yi-Cih Wu (2017)

> Home

Details and statistics

DOI: 10.1587/TRANSELE.E100.C.446

access: closed

type: Journal Article

metadata version: 2025-07-17

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/ChenHW17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/ChenHW17
Shen-Li Chen, Yu-Ting Huang, Yi-Cih Wu:
Design of High-ESD Reliability in HV Power pLDMOS Transistors by the Drain-Side Isolated SCRs. IEICE Trans. Electron. 100-C(5): 446-452 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.