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"Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital ..."

Tetsuro Matsuno, Daisuke Kosaka, Makoto Nagata (2010)

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DOI: 10.1587/TRANSFUN.E93.A.440

access: closed

type: Journal Article

metadata version: 2020-04-11

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Tetsuro Matsuno, Daisuke Kosaka, Makoto Nagata:
Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital Circuits. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 440-447 (2010)

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