"Low Latency 256-bit $mathbb{F}_p$ ECDSA Signature Generation Crypto Processor."

Shotaro Sugiyama, Hiromitsu Awano, Makoto Ikeda (2018)

> Home

Details and statistics

DOI: 10.1587/TRANSFUN.E101.A.2290

access: closed

type: Journal Article

metadata version: 2020-04-11

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/SugiyamaAI18
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/SugiyamaAI18
Shotaro Sugiyama, Hiromitsu Awano, Makoto Ikeda:
Low Latency 256-bit $mathbb{F}_p$ ECDSA Signature Generation Crypto Processor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(12): 2290-2296 (2018)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.