"Spur reducing architecture of frequency synthesiser using switched capacitors."

Debashis Mandal, Pradip Mandal, T. K. Bhattacharyya (2014)

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DOI: 10.1049/IET-CDS.2013.0200

access: closed

type: Journal Article

metadata version: 2020-09-10

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Debashis Mandal, Pradip Mandal, T. K. Bhattacharyya:
Spur reducing architecture of frequency synthesiser using switched capacitors. IET Circuits Devices Syst. 8(4): 237-245 (2014)

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