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"Circuit performance analysis of graded doping of channel of DGMOS with ..."

Swarnil Roy et al. (2019)

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DOI: 10.1049/IET-CDS.2018.5199

access: closed

type: Journal Article

metadata version: 2022-10-02

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Swarnil Roy, Sagar Mukherjee, Arka Dutta, Chandan Kumar Sarkar, Chayanika Bose:
Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application. IET Circuits Devices Syst. 13(3): 337-343 (2019)

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