"Implementation of nMPRA CPU architecture based on preemptive hardware ..."

Ionel Zagan, Vasile Gheorghita Gaitan (2017)

> Home

Details and statistics

DOI: 10.1049/IET-CDT.2017.0163

access: closed

type: Journal Article

metadata version: 2020-07-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/iet-cdt/ZaganG17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/iet-cdt/ZaganG17
Ionel Zagan, Vasile Gheorghita Gaitan:
Implementation of nMPRA CPU architecture based on preemptive hardware scheduler engine and different scheduling algorithms. IET Comput. Digit. Tech. 11(6): 221-230 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.