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"FDSTDL: Low-power technique for FinFET domino circuits."

Sandeep Garg, Tarun Kumar Gupta (2019)

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DOI: 10.1002/CTA.2627

access: closed

type: Journal Article

metadata version: 2021-10-14

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  - journals/ijcta/GargG19
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  - https://dblp.org/rec/journals/ijcta/GargG19
Sandeep Garg, Tarun Kumar Gupta:
FDSTDL: Low-power technique for FinFET domino circuits. Int. J. Circuit Theory Appl. 47(6): 917-940 (2019)

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