"An FPGA systolic array using pseudo-random bit generators for computing ..."

Dominique Lavenier (2000)

Details and statistics

DOI: 10.1016/S0167-9260(00)00011-0

access: closed

type: Journal Article

metadata version: 2020-02-20

a service of  Schloss Dagstuhl - Leibniz Center for Informatics