"Two-layer Bottleneck Channel Track Assignment for Analog VLSI."

Kazuya Taniguchi et al. (2024)

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DOI: 10.2197/IPSJTSLDM.17.67

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type: Journal Article

metadata version: 2024-08-08

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Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi, Mathieu Molongo, Makoto Minami, Katsuya Nishioka:
Two-layer Bottleneck Channel Track Assignment for Analog VLSI. IPSJ Trans. Syst. LSI Des. Methodol. 17: 67-76 (2024)

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