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"Design and Analysis of an Energy-Efficient High-Speed CMOS Double-Tail ..."

Avaneesh K. Dubey, Rajendra Kumar Nagaria (2019)

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DOI: 10.1142/S0218126619501573

access: closed

type: Journal Article

metadata version: 2023-03-18

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Avaneesh K. Dubey, Rajendra Kumar Nagaria:
Design and Analysis of an Energy-Efficient High-Speed CMOS Double-Tail Dynamic Comparator with Reduced Kickback Noise Effect. J. Circuits Syst. Comput. 28(9): 1950157:1-1950157:18 (2019)

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