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"Design of Power, Area and Delay Optimized Direct Digital Synthesizer Using ..."

Raju Ganna, Shanky Saxena, Govind Singh Patel (2022)

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DOI: 10.1142/S0218126622502929

access: closed

type: Journal Article

metadata version: 2023-01-15

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  - journals/jcsc/GannaSP22
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  - https://dblp.org/rec/journals/jcsc/GannaSP22
Raju Ganna, Shanky Saxena, Govind Singh Patel:
Design of Power, Area and Delay Optimized Direct Digital Synthesizer Using Modified 32-Bit Square Root Carry Select Adder. J. Circuits Syst. Comput. 31(17): 2250292:1-2250292:23 (2022)

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