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"Impact of High-k Spacer on Device Performance of Nanoscale Underlap Fully ..."
Rajneesh Sharma, Rituraj S. Rathore, Ashwani K. Rana (2018)
- Rajneesh Sharma, Rituraj S. Rathore, Ashwani K. Rana:
Impact of High-k Spacer on Device Performance of Nanoscale Underlap Fully Depleted SOI MOSFET. J. Circuits Syst. Comput. 27(4): 1850063:1-1850063:13 (2018)
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