"A scalable VLSI speed/area tunable sorting network."

Giuseppe Campobello, Marco Russo (2006)

> Home

Details and statistics

DOI: 10.1016/J.SYSARC.2006.04.002

access: closed

type: Journal Article

metadata version: 2020-05-19

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jsa/CampobelloR06
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jsa/CampobelloR06
Giuseppe Campobello, Marco Russo:
A scalable VLSI speed/area tunable sorting network. J. Syst. Archit. 52(10): 589-602 (2006)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.