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"Timing analysis for DCFL/SDCFL VLSI circuits."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Luis Gómez, Antonio Hernández, Antonio Núñez (1993)

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DOI: 10.1016/0165-6074(93)90189-R

access: closed

type: Journal Article

metadata version: 2020-05-19

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  dblp key:
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Luis Gómez, Antonio Hernández, Antonio Núñez:
Timing analysis for DCFL/SDCFL VLSI circuits. Microprocess. Microprogramming 38(1-5): 511-518 (1993)

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