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"A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture."
Yasuro Shobatake et al. (1991)
- Yasuro Shobatake, Masahiko Motoyama, Emiko Shobatake, Takashi Kamitake, Shoichi Shimizu, Makoto Noda, Kenji Sakaue:
A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture. IEEE J. Sel. Areas Commun. 9(8): 1248-1254 (1991)
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