


default search action
"A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b ..."
Abhishek Agrawal et al. (2023)
- Abhishek Agrawal

, Amy Whitcombe
, Woorim Shin, Ritesh Bhat
, Somnath Kundu
, Peter Sagazio
, Hariprasad Chandrakumar
, Thomas William Brown
, Brent R. Carlton
, Christopher Dennis Hull, Steven Callender
, Stefano Pellerano:
A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET. IEEE J. Solid State Circuits 58(12): 3364-3379 (2023)

manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.


Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID













