"A clock generator with cascaded dynamic frequency counting loops for wide ..."

Pao-Lung Chen et al. (2006)

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DOI: 10.1109/JSSC.2006.874273

access: closed

type: Journal Article

metadata version: 2022-01-03

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Pao-Lung Chen, Ching-Che Chung, Jyh-Neng Yang, Chen-Yi Lee:
A clock generator with cascaded dynamic frequency counting loops for wide multiplication range applications. IEEE J. Solid State Circuits 41(6): 1275-1285 (2006)

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