"A 100 MS/s 4 MHz Bandwidth 70 dB SNR ΔΣ ADC in 90 nm CMOS."

Yoshihisa Fujimoto et al. (2009)

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DOI: 10.1109/JSSC.2009.2020458

access: closed

type: Journal Article

metadata version: 2020-08-30

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Yoshihisa Fujimoto, Yusuke Kanazawa, Pascal Lo Ré, Kunihiko Iizuka:
A 100 MS/s 4 MHz Bandwidth 70 dB SNR ΔΣ ADC in 90 nm CMOS. IEEE J. Solid State Circuits 44(6): 1697-1708 (2009)

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