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"High-speed architecture for a programmable frequency divider and a ..."

Patrik Larsson (1996)

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DOI: 10.1109/4.509859

access: closed

type: Journal Article

metadata version: 2022-07-18

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Patrik Larsson:
High-speed architecture for a programmable frequency divider and a dual-modulus prescaler. IEEE J. Solid State Circuits 31(5): 744-748 (1996)

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