"340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With ..."

Sanu Mathew et al. (2015)

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DOI: 10.1109/JSSC.2014.2384039

access: closed

type: Journal Article

metadata version: 2023-10-22

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Sanu Mathew, Sudhir Satpathy, Vikram B. Suresh, Mark A. Anders, Himanshu Kaul, Amit Agarwal, Steven Hsu, Gregory K. Chen, Ram Krishnamurthy:
340 mV-1.1 V, 289 Gbps/W, 2090-Gate NanoAES Hardware Accelerator With Area-Optimized Encrypt/Decrypt GF(2 4 ) 2 Polynomials in 22 nm Tri-Gate CMOS. IEEE J. Solid State Circuits 50(4): 1048-1058 (2015)

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