"An Ultra-Low-Voltage Bit-Interleaved Synthesizable 13T SRAM Circuit."

Jiacong Sun et al. (2022)

> Home

Details and statistics

DOI: 10.1109/JSSC.2022.3166944

access: closed

type: Journal Article

metadata version: 2022-11-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/jssc/SunGLJ22
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/jssc/SunGLJ22
Jiacong Sun, Hao Guo, Geng Li, Hailong Jiao:
An Ultra-Low-Voltage Bit-Interleaved Synthesizable 13T SRAM Circuit. IEEE J. Solid State Circuits 57(11): 3477-3489 (2022)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.