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"Optimization of word-line booster circuits for low-voltage flash memories."

Toru Tanzawa, Shigeru Atsumi (1999)

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DOI: 10.1109/4.777107

access: closed

type: Journal Article

metadata version: 2023-03-21

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  - journals/jssc/TanzawaA99
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  - https://dblp.org/rec/journals/jssc/TanzawaA99
Toru Tanzawa, Shigeru Atsumi:
Optimization of word-line booster circuits for low-voltage flash memories. IEEE J. Solid State Circuits 34(8): 1091-1098 (1999)

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