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"Fast and efficient FPGA implementation of Polar Codes and SoC test bench."
Federico G. Krasser et al. (2021)
- Federico G. Krasser
, Mónica C. Liberatori, Leonardo Coppolillo
, Leonardo J. Arnone
, Jorge Castiñeira Moreira:
Fast and efficient FPGA implementation of Polar Codes and SoC test bench. Microprocess. Microsystems 84: 104264 (2021)
![](https://dblp.org/img/cog.dark.24x24.png)
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