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"A low power 16-bit 50 MS/s pipeline ADC with 104 dB SFDR in 0.18 μm CMOS."

Xiaodan Zhou et al. (2024)

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DOI: 10.1016/J.MEJO.2024.106144

access: closed

type: Journal Article

metadata version: 2024-06-04

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Xiaodan Zhou, Weipeng He, Dongbing Fu, Jianan Wang, Guangbing Chen, Qiang Li:
A low power 16-bit 50 MS/s pipeline ADC with 104 dB SFDR in 0.18 μm CMOS. Microelectron. J. 146: 106144 (2024)

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