"Implementation of self-checking two-level combinational logic on FPGA and ..."

Mile K. Stojcev, Goran Lj. Djordjevic, Tatjana R. Stankovic (2004)

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DOI: 10.1016/S0026-2714(03)00377-9

access: closed

type: Journal Article

metadata version: 2024-10-06

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Mile K. Stojcev, Goran Lj. Djordjevic, Tatjana R. Stankovic:
Implementation of self-checking two-level combinational logic on FPGA and CPLD circuits. Microelectron. Reliab. 44(1): 173-178 (2004)

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