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"Testable Realizations for FET Stuck-Open Faults CMOS Combinational Logic ..."

Sudhakar M. Reddy, Madhukar K. Reddy (1986)

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DOI: 10.1109/TC.1986.1676825

access: closed

type: Journal Article

metadata version: 2017-05-20

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  persistent URL:
  - https://dblp.org/rec/journals/tc/ReddyR86
Sudhakar M. Reddy, Madhukar K. Reddy:
Testable Realizations for FET Stuck-Open Faults CMOS Combinational Logic Circuits. IEEE Trans. Computers 35(8): 742-754 (1986)

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