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"Reconfiguring Processor Arrays Using Multiple-Track Models: The ..."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath (1993)

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DOI: 10.1109/12.247834

access: closed

type: Journal Article

metadata version: 2017-05-20

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  dblp key:
  - journals/tc/VarvarigouRK93a
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  persistent URL:
  - https://dblp.org/rec/journals/tc/VarvarigouRK93a
Theodora A. Varvarigou, Vwani P. Roychowdhury, Thomas Kailath:
Reconfiguring Processor Arrays Using Multiple-Track Models: The 3-Track-1-Spare-Approach. IEEE Trans. Computers 42(11): 1281-1293 (1993)

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