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"Synchronous logic synthesis: algorithms for cycle-time minimization."

Giovanni De Micheli (1991)

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DOI: 10.1109/43.62792

access: closed

type: Journal Article

metadata version: 2020-09-24

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Giovanni De Micheli:
Synchronous logic synthesis: algorithms for cycle-time minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10(1): 63-73 (1991)

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