"Exploiting Serial Access and Asymmetric Read/Write of Domain Wall Memory ..."

Jinil Chung et al. (2016)

> Home

Details and statistics

DOI: 10.1109/TCSI.2015.2497558

access: closed

type: Journal Article

metadata version: 2020-05-22

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcas/ChungRPG16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcas/ChungRPG16
Jinil Chung, Kenneth Ramclam, Jongsun Park, Swaroop Ghosh:
Exploiting Serial Access and Asymmetric Read/Write of Domain Wall Memory for Area and Energy-Efficient Digital Signal Processor Design. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(1): 91-102 (2016)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.