"Large Within-Die Gate Delay Variations in Sub-Threshold Logic Circuits at ..."

Ryo Takahashi et al. (2012)

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DOI: 10.1109/TCSII.2012.2231038

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type: Journal Article

metadata version: 2020-05-27

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Ryo Takahashi, Hidehiro Takata, Tadashi Yasufuku, Hiroshi Fuketa, Makoto Takamiya, Masahiro Nomura, Hirofumi Shinohara, Takayasu Sakurai:
Large Within-Die Gate Delay Variations in Sub-Threshold Logic Circuits at Low Temperature. IEEE Trans. Circuits Syst. II Express Briefs 59-II(12): 918-921 (2012)

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