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"A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability."
Adam Teman et al. (2012)
- Adam Teman

, Anatoli Mordakhay, Janna Mezhibovsky, Alexander Fish
:
A 40-nm Sub-Threshold 5T SRAM Bit Cell With Improved Read and Write Stability. IEEE Trans. Circuits Syst. II Express Briefs 59-II(12): 873-877 (2012)

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